A High Gain Low Noise Figure Double Balanced Down Conversion Mixer for Band 1 of WiMedia System

Objective: To propose an improved double balanced down conversion mixer for band 1 of WiMedia system at RF frequency of 3.432 GHz and IF frequency of 264 MHz. Method/Analysis: The proposed mixer is based on the Gilbert cell architecture. It uses switch bias technique to improve the noise figure and resistive current injection technique to improve the conversion gain and linearity. A resonating inductor is used to cancel out the effects of parasitic capacitances. Moreover, T type impedance matching, LC impedance matching and output buffer are used at RF trans conductance stage, LO switching stage and load stage respectively for matching purpose. Mixer is simulated in 0.18 μm CMOS technology using keysight Advanced Design System (ADS) software. Findings: Simulation results show that mixer achieves maximum conversion gain of 8.057 dB, third order Input Intercept Point (IIP3) of -10.88 dBm, Double Sideband (DSB) noise figure of 3.515 dB and S11 of -22.926 dB at 1.8 V dc supply voltage. Novelty/Improvement: A high gain, low noise figure double balanced down conversion mixer with low value of input reflection coefficient and suitable linearity is proposed for band 1 of Wimedia system. *Author for correspondence


Introduction
WiMedia system provides an ISO-published radio standard for high-speed, ultra-wideband wireless personal area network. This technology is accepted by industries for wireless USB and high-speed bluetooth applications 1 . This standard uses 3.1-10.6 GHz unlicensed frequency spectrum. This spectrum spans into 14 bands, each with a bandwidth of 528 MHz Band 1 ranges from 3.168 GHz to 3.696 GHz with center frequency of 3.432 GHz 2 . ential input RF signal voltage to differential RF current. Transistors M3-M6 work as a differential switch controlled by differential LO signal. In this manner RF signal is periodically switched with LO frequency which results in mixing operation of RF and LO signals.
Load resistors R L convert differential output IF current to differential output IF voltage.
Voltage conversion gain (A V ) of the mixer is given as A V = Amplitude of IF voltage/Amplitude of RF voltage as expressed by Equation (1).
Where m g is the transconductance of transistors M1 and M2. L R is the load resistance.

Proposed Work
In RF Integrated circuits design, there is trade off among different design parameters 3 . Main design objectives for receiver are high conversion gain and low noise figure with low vale of input reflection coefficient so main focus of this work is to propose a mixer for WiMedia receiver with high conversion gain, low noise figure and low value of input reflection coefficient with suitable linearity. Figure 2 shows schematic of proposed mixer without matching circuits at RF and LO ports. In proposed mixer, transistor M7 and M8 works as switch bias transistors. Initially switch bias technique is proposed for reducing MOSFET flicker noise in oscillator design 12 . Further this technique is adapted for mixing operation for a Direct Conversion Receiver (DCR) of UWB system 13 and heterodyne receiver of wireless LAN system 14 . In proposed mixer circuit, diode connected transistors (M9, M10) provide proper gate bias for the switch bias transistors (M7, M8). Each of the transistors M7 and M8 are switched periodically between an active and passive state, which results in low flicker noise 14 .     the mixer in terms of intermodulation distortion. IIP3 of the mixer is given by Equation (4). 3 6 DC IIP n ox Equation (1) and Equation (4) implies that conversion gain and IIP3 of the mixer can be improved by increasing the bias current flowing through the RF transconductance stage transistors M1 and M2 but if the bias current is increased arbitrarily then it results in lesser voltage headroom at the load stage 15    of constant current source for current bleeding requires many design restrictions to be simultaneously satisfied 15 . A resistive current injection technique is used in the proposed mixer by injecting the additional bias current to the RF transconductance stage transistors, bypassing the load and LO switching stage through resistors R5 and R6. By this technique, the bias current at RF stage is increased without disturbing the current through the load stage, which results in better conversion gain and IIP3 without decreasing the voltage headroom.
In the proposed mixer, an inductance is added in series with RF and LO stage to cancel out parasitic capacitance 17 . Added inductances L1 and L2 make a pi type matching network by combining parasitic capacitances at the source of LO transistor and drain of RF transistors which results in better tuning of the mixer. Figure 3 shows the forming of pi type network with C p1, L1 and C p2 , where C p1 is the gate to source parasitic capacitance of each of the LO transistors (M3, M4) and C p2 is the drain to gate parasitic capacitance of RF transcondutance stage transistor M1. Similarly, L2 inductance cancels out the parasitic capacitances of transistors (M5, M6) and M2.
In case of resistive load, the gain of the mixer can be increased by increasing L R as indicated by Equation (1) but it also results in lesser headroom as depicted by Equation (5). In the proposed mixer, a constant current source M13 and M14 is used in place of resistive load. The conversion gain of the mixer with constant current source is given by Equation (6).  Figure 4. Use of LC matching does not allow flexibility for choosing quality factor Q or bandwidth of the signal but this is not the issue at LO stage as LO signal does not carry any information and it acts only as switching signal for LO stage transistors. Further LC matching is simpler than three elements matching as it uses only two elements for matching purpose.
For impedance matching of RF port, three element T matching is used as shown in Figure 5. Three element type matching provides flexibility in choosing quality factor which is essential for matching of input RF signal. Complete schematic of proposed mixer circuit after accommodating matching circuits at LO and RF port is shown in Figure 6.

Simulation Results
The proposed mixer is simulated using ADS software with 0.18 µm CMOS process technology with 0 dBm LO power at 1.8 V DC supply voltage. RF frequency (f RF ) is taken equals to centre frequency of band 1 that is equal to 3.432 GHz. As per WiMedia recommendations, the receiver sensitivity for 1024 Mb/s should be − 63.5 dBm 2 .
So input RF power (P_RF) is varied from − 63.5 dBm to higher values to observe the gain compression phenomenon. Typical overall gain of front end RF filters and Low noise Amplifier (LNA) placed prior to mixer in receiver, is assumed as 8 dB 18 so operating RF input power level for mixer simulation is chosen as − 55.5 dBm ( − 63.5 dBm + 8 dBm), accommodating overall gain of front end filters and LNA.
Recommended channel bandwidth for WiMedia UWB system is 528 MHz so IF frequency is chosen equal to half of channel band width i.e. 528/2 = 264 MHz. LO frequency ( LO f ) in terms of RF frequency is given by Equation (7). LO RF IF Higher LO frequency is chosen as it provides better (lower) tuning range of LO. LO frequency is calculated as given by Equation (8) Simulated conversion gain as function of input RF power level as a result of gain compression simulation is shown in Figure 7. Conversion gain remains constant for lower values of input RF power level and gain starts decreasing at higher values of input RF power level, this is a very typical phenomenon in RF circuits, known as gain Mixer achieves flat maximum conversion gain as 8.057 dB at − 60 dBm to − 30 dBm input RF power levels.
Linearity of the proposed mixer is measured with the parameter P1dB. It is defined as the input RF power level at which gain is reduced by 1dB from the linear (maximum) gain. P1dB of the proposed mixer is equal to − 21.1 dB as shown in Figure 7. This value of P1dB is 34.4 (-21.1+55.5) dB away from operating power level (-55.5 dB) of RF input signal. This indicates that mixer shows linear behavior for large range of input power levels in terms of WiMedia specifications.
Variation of the ideal and simulated IF output power level (PIF) versus input RF power level (P_RF) as shown in Figure 8. It shows that simulated output IF power level starts decreasing at higher values of input RF power level, which is another validation of gain compression phenomenon in proposed mixer.
Variation of conversion gain versus input RF frequency is shown in Figure 9, which revalidate the value of conversion gain of 8.057 dB at input RF frequency of 3.432 GHz. The value of conversion gain at lower and higher end of frequencies of band 1 of WiMedia system is 6.235 dB and 3.738 dB respectively.
Output IF power spectrum is shown in Figure 10.  (highly reduced level of) second (even) harmonic due to its double balanced differential configuration.
For Intermodulation Distortion (IMD) simulation of the mixer, two RF frequencies should be chosen such that resultant third order intermodulation (IM) products, after mixing should lie within the IF bandwidth. 19 For IMD simulation of proposed mixer, the two input RF frequencies are chosen as f 1 = f RF + f spacing /2 and f 2 = f RF -f spacing /2 with a spacing of f spacing = 50 KHz. Two third order IMD frequencies generated are f USB (upper side band third order IM product) =2f 1 − f 2 and f LSB (lower side band third order IM product) =2f 2 − f 1 .Two third order IM mix products thus generated are f USB -f LO = 264.1 MHz and f LSB -f LO = 263.9 MHz, which lie within the IF bandwidth as they are very close to required IF frequency of 264 MHz.
Third order Input Intercept Point (IIP3) is parameter to evaluate the linearity performance of the mixer in terms of IMD. IIP3 is the input power level corresponding to the point of intersection of linearly extrapolated values of IF power level and third order IM products power level. Results of IMD simulation of the proposed mixer are shown in Figure 11, which shows IIP3 of the proposed mixer as − 10.880 dBm.
Simulation of Single Side Band (SSB) noise figure of the mixer versus input RF frequency is shown in Figure   Figure 9. Simulated conversion gain versus input RF frequency. 12, which shows SSB noise figure of the proposed mixer as 6.515 dB at 3.432 GHz input RF frequency.
DSB noise figure of the mixer is 3 dB less than the SSB noise figure so DSB noise figure of the mixer is 6.515 − 3 = 3.515 dB at 3.432 GHz input RF frequency Input reflection coefficient of mixer is measured in terms of S 11 scattering parameter. Simulated result of S 11 of the proposed mixer is shown in Figure 13, which shows the value of S 11 as − 22.926 dB at the desired RF frequency of 3.432 GHz. S 11 of the proposed mixer is well below the      Results of the mixer are summerized and compared with other state of art works as shown in Table 1. It can be seen that propsed mixer achieves a high conversion gain and low value of noise figure with a very low value of S 11 .

Conclusion
This paper presents a design of down converter mixer for heterodyne receiver for band 1 WiMedia system at RF frequency of 3.432 GHz and IF of 264 MHz. Mixer is simulated in 0.18 µm CMOS technology using keysight ADS software with 1.8 V dc supply voltage. Mixer achieves a high conversion gain of 8.057 dB and suitable linearity in terms of P1dB of -21.1 dBm and IIP3 of -10.88 dBm as a consequence of use of current injection technique. Use of switch bias technique enables the mixer to achieve a low value of DSB noise figure of 3.515 dB. A very low value of S 11 of -22.926 dB at RF frequency of 3.432 GHz indicates that proposed mixer is suitably matched at input RF port using T type matching network. Resonating inductor is used to cancel the effect of parasitic capacitances for better tuning of the mixer. So the proposed mixer is useful for RF front end receiver for band 1 WiMedia system.